################################################################################
##
## Filename: 	rtl/Makefile
##
## Project:	OpenArty, an entirely open SoC based upon the Arty platform
##
## Purpose:	To direct the Verilator build of the SoC sources.  The result
##		is C++ code (built by Verilator), that is then built (herein)
##	into a library.
##
##
## Creator:	Dan Gisselquist, Ph.D.
##		Gisselquist Technology, LLC
##
################################################################################
##
## Copyright (C) 2015-2019, Gisselquist Technology, LLC
##
## This program is free software (firmware): you can redistribute it and/or
## modify it under the terms of  the GNU General Public License as published
## by the Free Software Foundation, either version 3 of the License, or (at
## your option) any later version.
##
## This program is distributed in the hope that it will be useful, but WITHOUT
## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with this program.  (It's in the $(ROOT)/doc directory.  Run make with no
## target there if the PDF file isn't present.)  If not, see
## <http://www.gnu.org/licenses/> for a copy.
##
## License:	GPL, v3, as defined and found on www.gnu.org,
##		http://www.gnu.org/licenses/gpl.html
##
##
################################################################################
##
##
all:	test cpudefs.h design.h
YYMMDD=`date +%Y%m%d`
CXX   := g++
FBDIR := .
VDIRFB:= $(FBDIR)/obj_dir
VOBJ := obj_dir
CPUDR := cpu
BASE  := main

.DELETE_ON_ERROR:
.PHONY: test
test: $(VOBJ)/V$(BASE)__ALL.a
# test: $(VOBJ)/Venetctrl__ALL.a
SUBMAKE := $(MAKE) --no-print-directory -C $(VOBJ) -f
ifeq ($(VERILATOR_ROOT),)
VERILATOR := verilator
else
VERILATOR := $(VERILATOR_ROOT)/bin/verilator
endif
VFLAGS = -Wall --MMD -O3 -Wno-TIMESCALEMOD --trace -Mdir $(VDIRFB) $(AUTOVDIRS) -cc

-include make.inc

$(VOBJ)/V$(BASE)__ALL.a: $(VOBJ)/V$(BASE).h
$(VOBJ)/V$(BASE).mk:  $(VOBJ)/V$(BASE).cpp
$(VOBJ)/V$(BASE).cpp: $(VOBJ)/V$(BASE).h
$(VOBJ)/V$(BASE).h: $(VFLIST)
	$(VERILATOR) $(VFLAGS) $(BASE).v

$(VOBJ)/Venetctrl__ALL.a: $(VOBJ)/Venetctrl.h
$(VOBJ)/Venetctrl.mk:  $(VOBJ)/Venetctrl.cpp
$(VOBJ)/Venetctrl.cpp: $(VOBJ)/Venetctrl.h
$(VOBJ)/Venetctrl.h: enetctrl.v
	$(VERILATOR) $(VFLAGS) enetctrl.v

# $(VOBJ)/Venetctrl.h $(VOBJ)/Venetctrl.cpp $(VOBJ)/Venetctrl.mk: enetctrl.v
$(VOBJ)/V%.h: $(FBDIR)/%.v
	$(VERILATOR) $(VFLAGS) $*.v

$(VOBJ)/V%.cpp: $(VOBJ)/V%.h
$(VOBJ)/V%.mk:  $(VOBJ)/V%.h
$(VOBJ)/V%.h: $(FBDIR)/%.v

cpudefs.h: cpu/cpudefs.v
	@echo "Building cpudefs.h"
	@echo "// " > $@
	@echo "// Do not edit this file, it is automatically generated!" >> $@
	@echo "// To generate this file, \"make cpudefs.h\" in the rtl directory." >> $@
	@echo "// " >> $@
	@sed -e '{ s/^`/#/ }' $< | sed -e ' s/cpudefs.v/cpudefs.h/' >> $@
	@echo >> $@

design.h: main.v
	@echo "Building design.h"
	@echo "// " > $@
	@echo "// Do not edit this file, it is automatically generated!" >> $@
	@echo "// To generate this file, \"make design.h\" in the rtl directory." >> $@
	@echo "// " >> $@
	@echo "#ifndef DESIGN_H" >> $@
	@echo "#define DESIGN_H" >> $@
	@echo >> $@
	@grep "^\`" $< | grep -v default_nettype		\
		| grep -v include				\
		| grep -v timescale				\
		| sed -e '{ s/^`/#/ }'				\
		| sed -e ' s/^#elsif/#elif/'			\
		| sed -e ' s/main.v/design.h/' >> $@
	@echo >> $@
	@echo "#endif // DESIGN_H" >> $@

$(VOBJ)/V%__ALL.a: $(VOBJ)/V%.mk
	$(SUBMAKE) V$*.mk

.PHONY:
archive:
	tar --transform s,^,$(YYMMDD)-rtl/, -chjf $(YYMMDD)-rtl.tjz Makefile *.v cpu/*.v

.PHONY: clean
clean:
	rm -rf $(VOBJ)/ design.h cpudefs.h

#
# Note Verilator's dependency created information, and include it here if we
# can
DEPS := $(wildcard $(VOBJ)/*.d)
ifneq ($(MAKECMDGOALS),clean)
ifneq ($(DEPS),)
include $(DEPS)
endif
endif
